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EL5106, EL5306
Data Sheet September 1, 2004 FN7357.3
350MHz Fixed Gain Amplifiers with Enable
The EL5106 and EL5306 are fixed gain amplifiers with a bandwidth of 350MHz. This makes these amplifiers ideal for today's high speed video and monitor applications. They feature internal gain setting resistors and can be configured in a gain of +1, -1 or +2. With a supply current of just 1.5mA and the ability to run from a single supply voltage from 5V to 12V, these amplifiers are also ideal for handheld, portable or battery powered equipment. The EL5106 and EL5306 also incorporate an enable and disable function to reduce the supply current to 25A typical per amplifier. Allowing the CE pin to float or applying a low logic level will enable the amplifier. The EL5106 is offered in the 6-pin SOT-23 and the industrystandard 8-pin SO packages and the EL5306 is available in the 16-pin SO and 16-pin QSOP packages. All operate over the industrial temperature range of -40C to +85C.
Features
* Pb-free Available as an Option * Gain selectable (+1, -1, +2) * 350MHz -3dB BW (AV = 2) * 1.5mA supply current per amplifier * Fast enable/disable * Single and dual supply operation, from 5V to 12V * Available in SOT-23 packages * 450MHz, 3.5mA product available (EL5108 & EL5308)
Applications
* Battery powered equipment * Handheld, portable devices * Video amplifiers * Cable drivers * RGB amplifiers
Ordering Information
PART NUMBER EL5106IW-T7 EL5106IW-T7A EL5106IS EL5106IS-T7 EL5106IS-T13 EL5306IS EL5306IS-T7 EL5306IS-T13 EL5306IU EL5306IU-T7 EL5306IU-T13 EL5306IUZ (See Note) EL5306IUZ-T7 (See Note) EL5306IUZT13 (See Note) PACKAGE 6-Pin SOT-23 6-Pin SOT-23 8-Pin SO 8-Pin SO 8-Pin SO 16-Pin SO (0.150") 16-Pin SO (0.150") 16-Pin SO (0.150") 16-Pin QSOP 16-Pin QSOP 16-Pin QSOP 16-Pin QSOP (Pb-free) 16-Pin QSOP (Pb-free) 16-Pin QSOP (Pb-free) TAPE & REEL 7" (3K pcs) 7" (250 pcs) 7" 13" 7" 13" 7" 13" 7" 13" PKG. DWG. # MDP0038 MDP0038 MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0040 MDP0040 MDP0040 MDP0040 MDP0040 MDP0040
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B.
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002-2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners.
EL5106, EL5306 Pinouts
EL5106 (8-PIN SO) TOP VIEW
NC 1 IN- 2 IN+ 3 VS- 4 + 8 CE 7 VS+ 6 OUT 5 NC
EL5306 (16-PIN SO, QSOP) TOP VIEW
INA+ 1 CEA 2 VS- 3 CEB 4 INB+ 5 + + 16 INA15 OUTA 14 VS+ 13 OUTB 12 INB11 NC + 10 OUTC 9 INC-
EL5106 (6-PIN SOT-23) TOP VIEW
OUT 1 VS- 2 IN+ 3 +6 VS+ 5 CE 4 IN-
NC 6 CEC 7 INC+ 8
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EL5106, EL5306
Absolute Maximum Ratings (TA = 25C)
Supply Voltage between VS+ and VS- . . . . . . . . . . . . . . . . . . . 13.2V Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 50mA Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 125C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Pin Voltages. . . . . . . . . . . . . . . . . . . . . . . . . VS- -0.5V to VS+ +0.5V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40C to +85C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER AC PERFORMANCE BW -3dB Bandwidth
VS+ = +5V, VS- = -5V, RL = 150, TA = 25C unless otherwise specified. CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
AV = +1 AV = -1 AV = +2
250 380 350 20
MHz MHz MHz MHz V/s ns nV/Hz pA/Hz %
BW1 SR tS eN iN+ dG dP
0.1dB Bandwidth Slew Rate 0.1% Settling Time Input Voltage Noise IN+ Input Current Noise Differential Gain Error (Note 1) Differential Phase Error (Note 1) AV = +2 AV = +2 VO = -2.5V to +2.5V, AV = +2 VOUT = -2.5V to +2.5V, AV = 2 3000
4500 16 2.8 6 0.02 0.04
DC PERFORMANCE VOS TCVOS AE RF, RG Offset Voltage Input Offset Voltage Temperature Coefficient Gain Error Internal RF and RG Measured from TMIN to TMAX VO = -3V to +3V, RL = 150 -10 1 5 1 325 2.5 10 mV V/C %
INPUT CHARACTERISTICS CMIR +IIN RIN CIN Common Mode Input Range + Input Current Input Resistance Input Capacitance at IN+ 3 3.3 1.5 2 1 7 V A M pF
OUTPUT CHARACTERISTICS VO Output Voltage Swing RL = 150 to GND RL = 1k to GND IOUT SUPPLY ISON ISOFF PSRR ENABLE tEN Enable Time 280 ns Supply Current - Enabled (per amplifier) No load, VIN = 0V 1.35 1.5 12 75 1.82 25 mA A dB Output Current RL = 10 to GND 3.4 3.7 60 3.6 3.85 100 V V mA
Supply Current - Disabled (per amplifier) No load, VIN = 0V Power Supply Rejection Ratio DC, VS = 4.75V to 5.25V
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EL5106, EL5306
Electrical Specifications
PARAMETER tDIS IIHCE IILCE VIHCE VILCE NOTE: 1. Standard NTSC test, AC signal amplitude = 286mVP-P, f = 3.58MHz Disable Time CE Pin Input High Current CE Pin Input Low Current CE Input High Voltage for Power-down CE Input Low Voltage for Enable CE = VS+ CE = VS1 +1 VS+ -1 VS+ -3 VS+ = +5V, VS- = -5V, RL = 150, TA = 25C unless otherwise specified. (Continued) CONDITIONS MIN TYP 400 5 0 25 -1 MAX UNIT ns A A V V
DESCRIPTION
Pin Descriptions
EL5106 (SO8) 1, 5 2 4 EL5106 (SOT23-6) EL5306 (SO16, QSOP16) 6, 11 9, 12, 16 PIN NAME NC INFUNCTION Not connected Inverting input EQUIVALENT CIRCUIT
IN+
RG RF
IN-
CIRCUIT 1
3 4 6
3 2 1
1, 5, 8 3 10, 13, 15
IN+ VSOUT
Non-inverting input Negative supply Output
(Reference Circuit 1)
OUT RF
CIRCUIT 2
7 8
6 5
14 2, 4, 7
VS+ CE
Positive supply Chip enable
VS+
CE
VSCIRCUIT 3
4
EL5106, EL5306 Typical Performance Curves
5 NORMALIZED GAIN (dB)
VS=5V RL=150
11
3 GAIN (dB)
9
AV=+2 VS=5V RL=150
CL = 10pF CL = 6.8pF
1
AV = -1 AV = 2 AV = 1
7 CL = 2.2pF CL = 0pF 3
-1
5
-3
-5 100K
1M
10M FREQUENCY (Hz)
100M
1G
1 100K
1M
10M FREQUENCY (Hz)
100M
1G
FIGURE 1. FREQUENCY RESPONSE
FIGURE 2. FREQUENCY RESPONSE FOR VARIOUS CL
1.6
RL = 150
450 AV = -1
RL = 150 AV = -1
DELAY TIME (ns)
1.2 BW (MHz) AV = 1, 2 0.8 350 AV = 2
250 0.4 AV = 1
0 1 10 100 1K FREQUENCY (Hz)
150 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 10 10.5 11 FREQUENCY (Hz)
FIGURE 3. GROUP DELAY vs FREQUENCY
FIGURE 4. BANDWIDTH vs SUPPLY VOLTAGE
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0 RL = 150 -10 AV = -1 PSRR (dB) -20 -30 -40 -50 -60 -70 PSRR+ PSRR-
0.8 PEAKING (dB)
0.6
AV = 2
0.4 AV = 1
0.2
0 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 10 10.5 11 VS (V)
-80 1K
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 5. PEAKING vs SUPPLY VOLTAGE
FIGURE 6. POWER SUPPLY REJECTION RATIO vs FREQUENCY
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EL5106, EL5306 Typical Performance Curves
(Continued)
100
1.6 1.55 1.5 ISIS+
IMPEDANCE ()
10 IS (mA) 1 0.1 10K 100K 1M FREQUENCY (Hz) 10M 100M
1.45 1.4 1.35 1.3 1.25
1.2 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 10 10.5 11 VS (V)
FIGURE 7. OUTPUT IMPEDANCE vs FREQUENCY
FIGURE 8. SUPPLY CURRENT vs SUPPLY VOLTAGE (PER AMPLIFIER)
0 -10 -20 DISTORTION (dB) -30 -40 -50 -60 -70 -80 -90 0
VS=5V AV=2 RL=150 VOP-P=2V
M=100ns
HD3
CH1 2.00V/DIV
HD2
CH2 1.00V/DIV
10
20
30
40
50
60
FREQUENCY (MHz)
FIGURE 9. HARMONIC DISTORTION vs FREQUENCY
FIGURE 10. ENABLED RESPONSE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1 POWER DISSIPATION (W) 909mW SO16 (0.150") JA=110C/W 0.9 0.8 0.7 625mW 0.6 633mW 0.5 0.4 0.3 0.2 0.1 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (C) 391mW SOT23-6 JA=256C/W QSOP16 JA=158C/W SO8 JA=160C/W
M=100ns CH1 2.00V/DIV
CH2 1.00V/DIV
FIGURE 11. DISABLED RESPONSE
FIGURE 12. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
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EL5106, EL5306 Typical Performance Curves
(Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.4 POWER DISSIPATION (W) 1.2 1 909mW 0.8 893mW 0.6 435mW 0.4 0.2 0.1 0 0 SOT23-6 JA=230C/W QSOP16 JA=112C/W SO8 JA=110C/W 1.250W SO16 (0.150") JA=80C/W
25
50
75 85
100
125
150
AMBIENT TEMPERATURE (C)
FIGURE 13. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Applications Information
Product Description
The EL5106 and EL5306 are fixed gain amplifier that offers a wide -3dB bandwidth of 350MHz and a low supply current of 1.5mA. They work with supply voltages ranging from a single 5V to 12V and they are also capable of swinging to within 1.2V of either supply on the output. These combinations of high bandwidth and low power make the EL5106 and EL5306 the ideal choice for many lowpower/high-bandwidth applications such as portable, handheld, or battery-powered equipment. For varying bandwidth and higher gains, consider the EL5191 with 1GHz on a 9mA supply current or the EL5162 with 300MHz on a 4mA supply current. Versions include single, dual, and triple amp packages with 5-pin SOT-23, 16-pin QSOP, and 8-pin or 16-pin SO outlines.
enabled by floating or pulling the CE pin to at least 3V below the positive supply. For 5V supply, this means that the amplifier will be enabled when CE is 2V or less, and disabled when CE is above 4V. Although the logic levels are not standard TTL, this choice of logic voltages allow the EL5106 and EL5306 to be enabled by tying CE to ground, even in 5V single supply applications. The CE pin can be driven from CMOS outputs.
Gain Setting
The EL5106 and EL5306 are built with internal feedback and gain resistors. The internal feedback resistors have equal value; as a result, the amplifier can be configured into gain of +1, -1, and +2 without any external resistors. Figure 13 shows the amplifier in gain of +2 configuration. The gain error is 2% maximum. Figure 14 shows the amplifier in gain of -1 configuration. For gain of +1, IN+ and IN- should be connected together as shown in Figure 15. This configuration avoids the effects of any parasitic capacitance on the IN- pin. Since the internal feedback and gain resistors change with temperature and process, external resistor should not be used to adjust the gain settings.
325 325 ININ+ +
Power Supply Bypassing and Printed Circuit Board Layout
As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Low impedance ground plane construction is essential. Surface mount components are recommended, but if leaded components are used, lead lengths should be as short as possible. The power supply pins must be well bypassed to reduce the risk of oscillation. The combination of a 4.7F tantalum capacitor in parallel with a 0.01F capacitor has been shown to work well when placed at each supply pin.
Disable/Power-Down
The EL5106 and EL5306 amplifiers can be disabled placing their output in a high impedance state. When disabled, the amplifier supply current is reduced to <25A. The EL5106 and EL5306 are disabled when its CE pin is pulled up to within 1V of the positive supply. Similarly, the amplifier is
FIGURE 14. AV = +2
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EL5106, EL5306
325 325 ININ+ + 325
+5
FIGURE 15. AV = -1
0.1F 325
325 +5 1K 0.1F + VOUT
IN-
325 +
VIN
1K
IN+
FIGURE 16. AV = +1
FIGURE 17.
Supply Voltage Range and Single-Supply Operation
The EL5106 and EL5306 have been designed to operate with supply voltages having a span of greater than or equal to 5V and less than 11V. In practical terms, this means that the EL5106 and EL5306 will operate on dual supplies ranging from 2.5V to 5V. With single-supply, the EL5106 and EL5306 will operate from 5V to 10V. As supply voltages continue to decrease, it becomes necessary to provide input and output voltage ranges that can get as close as possible to the supply voltages. The EL5106 and EL5306 have an input range which extends to within 2V of either supply. So, for example, on 5V supplies, the EL5106 and EL5306 have an input range which spans 3V. The output range is also quite large, extending to within 1V of the supply rail. On a 5V supply, the output is therefore capable of swinging from -4V to +4V. Single-supply output range is larger because of the increased negative swing due to the external pull-down resistor to ground. Figure 16 shows an AC-coupled, gain of +2, +5V single supply circuit configuration.
Video Performance
For good video performance, an amplifier is required to maintain the same output impedance and the same frequency response as DC levels are changed at the output. This is especially difficult when driving a standard video load of 150, because of the change in output current with DC level. Previously, good differential gain could only be achieved by running high idle currents through the output transistors (to reduce variations in output impedance). Special circuitries have been incorporated in the EL5106 and EL5306 to reduce the variation of output impedance with current output. This results in dG and dP specifications of 0.02% and 0.04, while driving 150 at a gain of 2.
Output Drive Capability
In spite of its low 1.5mA of supply current per amplifier, the EL5106 and EL5306 are capable of providing a maximum of 125mA of output current.
Driving Cables and Capacitive Loads
When used as a cable driver, double termination is always recommended for reflection-free performance. For those applications, the back-termination series resistor will decouple the EL5106 and EL5306 from the cable and allow extensive capacitive drive. However, other applications may have high capacitive loads without a back-termination resistor. In these applications, a small series resistor (usually between 5 and 50) can be placed in series with the output to eliminate most peaking.
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EL5106, EL5306
Current Limiting
The EL5106 and EL5306 have no internal current-limiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device. where: TMAX = Maximum ambient temperature JA = Thermal resistance of the package n = Number of amplifiers in the package PDMAX = Maximum power dissipation of each amplifier in the package PDMAX for each amplifier can be calculated as follows:
V OUTMAX PD MAX = ( 2 x V S x I SMAX ) + ( V S - V OUTMAX ) x --------------------------R
L
Power Dissipation
With the high output drive capability of the EL5106 and EL5306, it is possible to exceed the 125C Absolute Maximum junction temperature under certain very high load current conditions. Generally speaking when RL falls below about 25, it is important to calculate the maximum junction temperature (TJMAX) for the application to determine if power supply voltages, load conditions, or package type need to be modified for the EL5106 and EL5306 to remain in the safe operating area. These parameters are calculated as follows:
T JMAX = T MAX + ( JA x n x PD MAX )
where: VS = Supply voltage ISMAX = Maximum bias supply current VOUTMAX = Maximum output voltage (required) RL = Load resistance
SO Package Outline Drawing
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EL5106, EL5306 SOT-23 Package Outline Drawing
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EL5106, EL5306 QSOP Package Outline Drawing
NOTE: The package drawings shown here may not be the latest versions. To check the latest revision, please refer to the Intersil website at http://www.intersil.com/design/packages/index.asp
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 11

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